1. Field of the Invention
This invention relates to a power converter, and more particularly to a multi-level output power converter used, for instance, in variable speed control of AC motors.
2. Description of the Related Art
Power converters constructed using power semiconductor devices for power conversion have been used in many fields.
Power converters capable of providing multi-level power outputs such as a neutral-point-clamped power converter, etc. are able to reduce the voltage load of power semiconductor devices composing the converters. Furthermore, compared with ordinary power converters, desired output waveforms are obtained at less switching frequency, and therefore, these converters are used as power converters for driving large capacity AC motors in variable speeds.
FIG. 13 shows the construction of a conventional neutral-point-clamped power converter, as a first example of a conventional multi-level output power converter. The operation, etc. of this system have been described in detail in, for instance, "A New Neutral-Point-Clamped PWM Inverter" (IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS", VOL. IA-17, No. 5 SEPTEMBER/OCTOBER 1981; AKIRA NABAE and others).
In FIG. 13, 1A and 1B are DC power sources, 2A-2D are reverse conducting semiconductor switches, 3A-3D are semiconductor switches such as gate-turn-off thyristors and 4A-4F are diodes. Reverse conducting semiconductor switches 2A-2D are respectively composed of semiconductive switches 3A-3D and diodes 4A-4F connected in anti-parallel.
Potentials at a positive side power terminal A, a neutral-point power terminal B, and a negative side power terminal C shown in FIG. 13 are +V.sub.DC, 0, and -V.sub.DC, respectively. An output voltage V.sub.U of an output terminal T of this power converter becomes as shown in FIG. 14 depending on the state of semiconductor switches 3A-3D.
However, as actually there are delayed times in the operation of semiconductor switches 3A-3D, Mode 2A (or Mode B) and Mode 4A (or Mode 4B) are inserted for about several microseconds from Mode 1 to Mode 3 (or from Mode 3 to Mode 1), and from Mode 3 to Mode 5 (or Mode 5 to Mode 3), respectively as shown in FIG. 15. This period is called a dead time, and the output voltages during these periods are decided depending on the direction of load currents. Because of this, on some converters, the timing of the switching is adjusted according to the direction of load current to suppress the output waveform from being deformed by the dead time.
Further, the anode to cathode voltages of semiconductor switches 3A-3D in each mode are as shown in FIG. 16.
As shown in FIG. 16, the neutral-point clamped power converter has the feature that the voltage applied to each of semiconductor switches 2A-2D is one-half of the DC voltage between terminals A and C.
However, the voltages shown in FIG. 16 are of theoretical magnitudes. For instance, when shifting from Mode 4B (the state where the load current flows through diodes 4C-4D) to Mode 3 by turning ON semiconductor switch 3B, the surges are generated as described below. As DC power source 1B is short circuited in the route of diode 4E and reverse conducting semiconductor switches 2B, 2C and 2D during the transition period from the time when semiconductor switch 3B is turned ON to the time when diode 4D is recovered (shifted from the ON state to the blocking state) and the voltage of semiconductor switch 3D becomes V.sub.DC, the surge current flows in this closed loop, and after diode 4D is recovered, the surge voltage is generated in diode 4D. Similar surges are generated when Mode 2B is shifted to Mode 1, Mode 2A is shifted to Mode 3 and Mode 4A is shifted to Mode 5, respectively.
FIG. 17 shows the construction of a four-value output power converter as a second example of a conventional multi-level output power converter. This system also has been described in detail in "A New Neutral-Point-Clamped PWM Inverter (IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS", VOL. IA-17, No. 5, SEPTEMBER/OCTOBER 1981; AKIRA NABAE and others) as the neutral-point-clamped power converter shown in FIG. 13.
In FIG. 17, 1A-1C are DC power sources, 2A-2E are reverse conducting semiconductor switches composed of semiconductor switches 3A-3F and diodes 4A-4J connected in anti-parallel, respectively.
Potentials of power terminals A, B, C and D are 3.times.V.sub.DC, +2.times.V.sub.DC, +V.sub.DC, and 0, respectively. Output voltage V.sub.U of output terminal T of this power converter becomes as shown in FIG. 18 depending on the state of semiconductor switches 3A-3F.
Further, the anode to cathode voltages of semiconductor switches 3A-3F in each mode are as shown in FIG. 19.
As shown in FIG. 19, the four-value output power converter has the feature that the voltage applied to each of semiconductor switches 3A-3F is one third of the DC voltage between terminals A and D.
Other operations and the voltages of semiconductor devices are the same as in the neutral-point-clamped power converter shown in FIG. 13.
In the conventional multi-level output power converters as shown in FIGS. 13 and 17, they are featured that the desired output waveforms are obtained at less switching frequency, and high voltage conversion can be made with low withstand voltage semiconductor switches. However, during the time of the mode switching, surge current as well as surge voltage may be generated as described above.